When one wishes to measure the time difference between the sampling times of two signals, such as, for example, the sampling time of an input signal as compared with the sampling time of an output signal, the problem of making this measurement is conventionally solved by using a counter circuit in which the timing signal for the counter is derived from the sampling rate of the input signal and the start/stop instruction signals for the counter, and the readout of the counter content is determined by a timing signal which is a function of the sampling times of the output signal. A sampling rate converter of this type requires rather costly circuitry for this purpose because the timing pulse rates of such a counter circuit are very high as a result of the desired signal quality. If, for example, frequencies to be converted are approximately 50 kHz and if the signal quality is to correspond to that of a 16-bit format, then the necessary timing or clock pulse rate is approximately 1.6 GHz. It will be recognized that such rapidly operating circuits can only be constructed from correspondingly high quality components and, even then, there are serious restrictions on the circuit designs which can be used.